Gen-3 Wideband Real-Time Adaptive Full-Duplex Radio

A Configurable Time-Domain Canceller

Wide-scale deployment of FD capability in wireless networks relies on analog SI canceller designs that are suitable for small-form-factor implementation within an RF integrated circuit (RFIC). Analog SI cancellation depends on the ability to match delays caused by the channel multipath effect. To achieve this, we presented a wideband time-domain canceller RFIC in [1] and [2], featuring 16 parallel RF taps with independently configurable taps and delays.

The canceller RFIC employs switched-capacitor-based time-interleaved circuits to achieve large, reconfigurable delays in a compact form factor. The individual taps fall into three tap classes:

  1. One zero-delay tap in which the input and output are directly connected;
  2. Five low-delay taps realized using eight parallel delay paths, providing up to 2ns delay with a resolution of 250ps across a 1GHz bandwidth when clocked at a 500 MHz frequency;
  3. Ten high-delay taps realized using 32 parallel delay paths, providing up to 8ns delay with a resolution of 250ps across a 1GHz bandwidth when clocked at a 500 MHz frequency.
Gen-3 RFIC Canceller Block Diagrams

To maximize SIC, the canceller IC must be configured with the optimal tap settings (gains and delays for both the RF and BB filters. However, there are three main challenges with selecting the optimal configuration:

  1. The large number (> 1019) of possible parameter choices across the 16 RF and 8 BB taps;
  2. The non-ideal response of the hardware implementation that may deviate from the analytical model;
  3. The quantization of gain and delay choices.

To this end, we have been developing the following full-duplex system architecture and canceller configuration algorithm, as shown in the figure below. A preliminary version of this system was demonstrated in [2], and will be demonstrated in [1] at SIGCOMM 2023.

The Gen-3 Full-Duplex Radio consists of the following primary components:

  • An National Instruments (NI)/Ettus Research Universal Software Radio Peripheral (USRP) 2974 software-defined radio (SDR) [link], which periodically transmits OFDM packets using variable bandwidth (10 MHz, 20 MHz, 50 MHz, and 100 MHz);
  • The Gen-3 canceller IC, which performs RF and BB cancellation based on its programmed configuration;
  • A Host PC operating GNU Radio 3.8 and UHD 4.2, which computes the self-interference channel and acts as a controller for the FPGA;
  • A Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit [link], which runs both the canceller initialization algorithm and the closed-loop adjustment aiming to compute the canceller configuration that maximizes SIC;
  • A circulator-based antenna interface, which provides initial SI isolation.

 

References

  1. Alon S. Levin, Eliot Flores Portillo, Sasank Garikapati, Ahuva Bechhofer, Bo Zhang, Manav Kohli, Igor Kadota,  Harish Krishnaswamy, Mingoo Seok, and Gil Zussman, "Demo: Achieving Self-Interference Cancellation Across Different Environments," in Proc. ACM MobiCom’24, Washington D.C., Nov. 2024. [download]

  2. Alon S. Levin, Igor Kadota, Sasank Garikapati, Bo Zhang, Aditya Jolly, Manav Kohli, Mingoo Seok, Harish Krishnaswamy, and Gil Zussman, "Demo: Experimentation with Wideband Real-Time Adaptive Full Duplex Radios," in ACM SIGCOMM'23, New York, NY, Sept. 2023. ACM SIGCOMM Student Research Competition (SRC) Winner – First Place [download]

  3. Igor Kadota*, Alon S. Levin*, Bo Zhang*, Sasank Garikapati, Aditya Jolly, Manav Kohli, Tingjun Chen, Mingoo Seok, Harish Krishnaswamy, and Gil Zussman, "Adaptive Configuration of a Variable-Gain, Variable-Delay Self-Interference Canceller for a Full-Duplex System," DARPA MTO WARP End of Phase Review, Fort Worth, TX, Jun. 2022. (* indicate equal contributions)

  4. Aravind Nagulu, Sasank Garikapati, Igor Kadota, Mostafa Essawy, Tingjun Chen, Arun Natarajan, Gil Zussman and Harish Krishnaswamy, “A Full-Duplex Wireless Node With CMOS Circulator and a Full-Duplex Receiver With Switched-Capacitor Delay Based Cancelers,” Demo in Proc. IEEE ISSCC'21, Feb. 2021. [video]

  5. Aravind Nagulu, Sasank Garikapati, Igor Kadota, Mostafa Essawy, Tingjun Chen, Arun Natarajan, Gil Zussman, and Harish Krishnaswamy, “Full-duplex receiver with wideband multi-domain FIR cancellation based on stacked-capacitor, N-path switched-capacitor delay lines achieving >+54dB SIC Across 80MHz BW and >+15dBm TX power handling,” in Proc. IEEE ISSCC’21, Feb. 2021. [download]